Instruction Sets

Instruction Sets

Frank has multiple classes of Intel and AMD hardware. Each processor model supports different instruction sets. The following is a list of supported SSE instruction sets. Refer to the System Architecture for precise queue information.

Processor Instruction Sets
Intel Nehalem (E5550) SSE2
SSSE3
SSE4.1
SSE4.2
AMD Magny Cour (6172) SSE2
Intel Westmere (X5650) SSE2
SSSE3
SSE4.1
SSE4.2
AMD Bulldozer (6276) SSE2
SSSE3
SSE4.1
SSE4.2
AVX*
Intel Sanyd Bridge (E5-2670) SSE2
SSSE3
SSE4.1
SSE4.2
AVX
  • AVX does not work on Bulldozer processors with the Intel compilers.

Compiler Flags

It is helpful to read the Intel Documentation on the correct flags for using SSE instruction flags. Very briefly, there are three options.

  1. -m<instruction-set> means that the compiler may generate code that can run on where the SSE version is supported.
  2. -x<instruction-set> means that the compiler will generate code that only be run on supported hardware.
  3. -ax<instruction-set> means that the compiler will generate two instruction paths and run the appropriate path when supported hardware is found.

Since all of our compute nodes support at least SSE2 and we recommend the following flags.

CC -axAVX -msse2
  • Never use -xHOST because the log in nodes are not the same hardware as the compute nodes.